HLT
From Asmpedia
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Halt the processor
| Intel | AMD |
|---|---|
| + | + |
Definition:
HLT
Causes the processor to stop executing instruction flow and wait for the following interrupts and signals to occur:
- Unmasked hardware interrupt (INTR)
- Non-maskable interrupt (NMI)
- System management interrupt (SMI)
- Debug exception
- BINIT#, INIT# and RESET# signals
Operation in pseudo code:
hlt()
{
if (cpl) // current privilege level != 0
throw #GP;
enter_state(HALT);
}
Opcodes (x86/x64):
| F4 | - | HLT | - |
EFLAGS
:31 | :30 | :29 | :28 | :27 | :26 | :25 | :24 | :23 | :22 | ID :21 | VIP :20 | VIF :19 | AC :18 | VM :17 | RF :16 | :15 | NT :14 | IOPL :13:12 | OF :11 | DF :10 | IF :9 | TF :8 | SF :7 | ZF :6 | :5 | AF :4 | :3 | PF :2 | :1 | CF :0 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | - | - | - | - | - | - | 0 | - | - | - | - | - | - | - | - | 0 | - | 0 | - | 1 | - |
Annotated WinDbg disassembly (x86/x64):
f4 hlt

